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    Nuo is currently a Software Development Engineer in a Seattle-based software company.




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Calculating Required Storage In a Direct-Mapped Cache

Suppose a 1-level direct-mapped cache need to have 64 KB's data, each block is 16-byte, and the memory address is 32-bit.

To  calculate the total bits needed for the cache, we could go through  the following steps:

  • We need to have 64 KB's data (2^16 bytes) in the cache, and each block is sized as 16 bytes (2^4), so we totally need 2^12 blocks for the data, let's call the "12" as "a." This means a bits are used for the index.
  • Each word has 4 bytes, then in this case each block has 2^2 words, let's call the exponent 2 as "b." This means b bits are used for word in each block.
  • The size of the tag is determined by the equation "length of address - (a+b+2)," the 2 bits here are the byte offset of the address. So, in this case, it's "32 - (12+2+2) = 16."
  • Each block has 16 bytes, each byte has 8 bits, so the amount of data for each block is 16 * 8 + tag + valid bit = 128 + 16 + 1 = 145 bits.
  • Times the amount of data for each block (145) to the number of blocks (2^12). Then we get 593920 Bits. Convert to KB, it is 72.5 KB.

So 72.5 KB's of data is required to make a 64KB 1-level direct-mapped cache .

In general, the idea is very simple: total bits required = number of blocks * bits required for each block. Mistakes can usually be made during the process of calculating the size of the tag. Sometimes it's also easy to forget to add the valid bit. But if doing it carefully, we could realize that the way of calculating it is quite simple.

Posted: Thu, May 3 2007 21:58 by Nuo Yan | with 13 comment(s) |
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Comments

krishan said:

thank you very much for this article,,I missed my lecture on this one and I got what I wanted here.

# November 16, 2007 8:21 PM

krishan said:

Dear Nuo Yan,

you must look again the way you are calculating and describing parameter "b", and then finally in the calculation you are hardcoding an addition of 2 (a+b+2), I think thats not correct.

# November 16, 2007 8:43 PM

Nuo Yan said:

Hi krishan,

under the assumption that the memory address is 32-bit, there are 2^a blocks, and each block has 2^b word. Then: a bits are used for index, b bits are used for words in each block, and 2 bits are used for byte offset. So the tag size should be 32 - (a+b+2).

That's my best knowledge. I think it's correct. Let me know if you think it's not or if you have a better way describing it.

Thanks!

Nuo

# November 19, 2007 5:55 PM

bin said:

I think the b should be 4. It's the byte index in the block. No need to treat them as words and then split to bytes. Whatever, it depends on the particular micro architecture you choose.

# December 12, 2007 10:19 PM

Ryan said:

What if you are using a write-back architecture and a dirty bit is required?  Do you just add ... + tag + valid bit + dirty bit?

Also, what if you are using 1 word blocks?

In such a case we would have each block = 1 word = 2^0 -> b=0.  Therefore, Tag Size = 32 - (12+0+2) = 18 bits.  Is this problematic?

# December 14, 2007 12:50 AM

Tina said:

What does tag contain? for example, given a memory address 001000, what is the number for the tag?

# March 8, 2008 7:20 AM

Julio Castilla said:

b should be 4.....

# May 7, 2008 10:20 AM

huda said:

hi,

how i can  calculate the storage capacity of associative and set associative mapping of cache.

there is no any information about that.

# January 12, 2009 6:50 AM

huda said:

hi,

I would like to know ,are PC containing on  virtual address or physical address?

# January 12, 2009 6:57 AM

huda said:

yes, b should 4.

b+2 needlessly.

# January 12, 2009 7:14 AM

takameyer said:

Great explanation.  My prof failed to give a really good explanation on this.  Got an exam that includes this topic in about 30 minutes, so thanks for saving my grade!

# April 6, 2009 3:22 PM

toni said:

Cache size = 64 KB = 2^16 bytes = 2^14 words

block size = 16bytes = 2^4 bytes =2^2 words therefore(from block size), b=2

no of blocks a, 2^14 - 2^2 =2^12 a =12

tag bits =(32 – 12 + 2 + 2) = 16 bits

Cache entry size = block data bits  + tag bits + valid bit

                  = (32 X 2^2) + 16 + 1 = 145 bits

amount of  data in cache = 2^12 x 145 =593,920 bits =72.5kB

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